Instruction set

The MIPS64 ISA is an extension of the MIPS32 ISA, so it includes all of the instructions and features of the MIPS32 ISA.

Category	Description
Data processing	Instructions that perform arithmetic and logical operations on data stored in registers or memory
Control flow	Instructions that allow the processor to change the flow of execution in a program
Memory access	Instructions that allow the processor to read from and write to memory
Floating point	Instructions that support the use of floating point numbers in programs
Multimedia	Instructions that are optimized for processing multimedia data, such as audio and video

Overall, the MIPS64 instruction set includes a wide range of instructions designed to support a variety of different types of applications and workloads.

Data processing

Instruction	Description
daddu, dsubu	Add or subtract two 64-bit values and store the result in a register
dmult, ddiv	Multiply or divide two 64-bit values and store the result in a register
daddi, dsubi	Add or subtract a 64-bit value and an immediate value and store the result in a register
daddiu, dsubiu	Add or subtract a 64-bit value and an immediate value (unsigned) and store the result in a register
dmultu, ddivu	Multiply or divide two 64-bit values (unsigned) and store the result in a register

These instructions allow the processor to perform arithmetic operations on 64-bit values, which can be useful in applications that require the use of large integers or pointers. They are not present in the MIPS32 instruction set, but are available in the MIPS64 instruction set.

Control flow

Instruction	Description
jalr.hb, jalr.hbr	Jump to a new address and store the return address in a register, with the option to specify a hint for the target address
beqzalc, bnezalc	Branch to a new address if a value is equal to or not equal to zero, and store the return address in a register
bgezalc, blezalc	Branch to a new address if a value is greater than or equal to or less than or equal to zero, and store the return address in a register
bgezallc, blezallc	Branch to a new address if a value is greater than or equal to or less than or equal to zero (likely), and store the return address in a register

These instructions allow the processor to change the flow of execution in a program, with the added ability to store the return address in a register and to provide a hint for the target address. They are not present in the MIPS32 instruction set, but are available in the MIPS64 instruction set.

Memory access

Instruction	Description
ld, sd	Load or store a 64-bit value from or to memory
lwu, swu	Load or store a 64-bit value from or to memory (unsigned)
lld, scd	Load a linked or store a conditional 64-bit value from or to memory

These instructions allow the processor to access 64-bit values in memory, which can be useful in applications that require the use of large integers or pointers. They are not present in the MIPS32 instruction set, but are available in the MIPS64 instruction set.

Floating point

Instruction	Description
add.d, sub.d	Add or subtract two 64-bit floating point values and store the result in a register
mul.d, div.d	Multiply or divide two 64-bit floating point values and store the result in a register
cvt.d.w, cvt.d.l	Convert a 32-bit or 64-bit integer value to a 64-bit floating point value and store the result in a register
cvt.w.d, cvt.l.d	Convert a 64-bit floating point value to a 32-bit or 64-bit integer value and store the result in a register

These instructions allow the processor to perform arithmetic operations on 64-bit floating point values, as well as to convert between floating point and integer formats. They are not present in the MIPS32 instruction set, but are available in the MIPS64 instruction set.

Multimedia

Instruction	Description
pack.d	Pack 64-bit integers into a single register
unpack.d	Unpack 64-bit integers from a single register
add.q	Perform an addition operation on packed data
mul.q	Perform a multiplication operation on packed data

These instructions are optimized for processing multimedia data, such as audio and video. They allow the processor to perform operations on packed data (e.g. packed 64-bit integers) and to perform SIMD (Single Instruction, Multiple Data) operations. They are not present in the MIPS32 instruction set, but are available in the MIPS64 instruction set.

Resources

Imagination's MIPS64 architecture with high-performance cachesMIPS