Instruction set

The main instruction set of the x86/x64 ISA includes a variety of instructions for performing arithmetic operations, moving data, managing the stack, branching, and more. The following table provides a brief overview of some of the main instruction categories in the x86/x64 ISA:

Instruction categoryDescription

Arithmetic instructions

These instructions perform basic arithmetic operations such as addition, subtraction, multiplication, and division. They can operate on both integer and floating-point values.

Logic instructions

These instructions perform logical operations such as AND, OR, XOR, and NOT. They are often used for bitwise operations or to set or test individual bits in a register or memory location.

Data transfer instructions

These instructions are used to move data between registers, memory locations, or immediate values. They can also be used to load constants or perform memory address calculations.

Control flow instructions

These instructions are used to change the flow of execution in a program. They include conditional and unconditional jumps, subroutine calls and returns, and instructions for managing the stack.

String instructions

These instructions are used for efficient processing of strings, such as copying or comparing blocks of memory. They can operate on both byte-sized and word-sized strings.

Input/output instructions

These instructions are used to communicate with external devices such as keyboards, mice, printers, and other peripherals. They can be used to read or write data to and from specific memory-mapped IO ports or to control the flow of data between the CPU and these devices.

This is just a brief overview of some of the main instruction categories in the x86/x64 ISA. There are many other instruction categories and specific instructions within each category, each of which serves a specific purpose and can be used in various ways to implement a given algorithm or program.

Arithmetic instruction

The x86/x64 ISA includes a variety of instructions for performing arithmetic operations. The following table provides a list of some common arithmetic instructions and a brief description of each:

InstructionDescription

ADD

Adds two operands and stores the result in the destination operand. The operands can be registers, memory locations, or immediate values.

SUB

Subtracts the second operand from the first operand and stores the result in the destination operand. The operands can be registers or memory locations.

MUL

Multiplies the first operand by the second operand and stores the result in the destination operand. The first operand must be a register.

IMUL

Multiplies the first operand by the second operand and stores the result in the destination operand. The operands can be registers or memory locations.

DIV

Divides the first operand by the second operand and stores the result in the destination operand. The first operand must be a register.

IDIV

Divides the first operand by the second operand and stores the result in the destination operand. The operands can be registers or memory locations.

INC

Increments the value of the operand by one. The operand can be a register or a memory location.

DEC

Decrements the value of the operand by one. The operand can be a register or a memory location.

These instructions can operate on both integer and floating-point values. In addition to the instructions listed above, the x86/x64 ISA also includes instructions for performing more complex arithmetic operations such as square root, trigonometric functions, and more.

Logic instructions

The x86 ISA includes a variety of instructions for performing logical operations. The following table provides a list of some common logic instructions and a brief description of each:

InstructionDescription

AND

Performs a bitwise AND operation on the two operands and stores the result in the destination operand. The operands can be registers, memory locations, or immediate values.

OR

Performs a bitwise OR operation on the two operands and stores the result in the destination operand. The operands can be registers, memory locations, or immediate values.

XOR

Performs a bitwise XOR operation on the two operands and stores the result in the destination operand. The operands can be registers, memory locations, or immediate values.

NOT

Performs a bitwise NOT operation on the operand, inverting each bit in the operand. The operand can be a register or a memory location.

SHL

Performs a bitwise left shift operation on the first operand, shifting the bits in the operand to the left by the number of bits specified by the second operand. The result is stored in the destination operand.

SHR

Performs a bitwise right shift operation on the first operand, shifting the bits in the operand to the right by the number of bits specified by the second operand. The result is stored in the destination operand.

These instructions are often used for bitwise operations or to set or test individual bits in a register or memory location. They can also be used for performing logical operations on integer or floating-point values.

Data transfer instructions

The x86 ISA includes a variety of instructions for transferring data between registers, memory locations, or immediate values. The following table provides a list of some common data transfer instructions and a brief description of each:

InstructionDescription

MOV

Copies the value of the second operand to the destination operand. The operands can be registers, memory locations, or immediate values. The source and destination operands can be different sizes (e.g., a 32-bit register and a 16-bit memory location).

LEA

Loads the memory address of the second operand into the destination operand. The second operand must be a memory location, and the destination operand must be a register. This instruction can be used for address calculation.

PUSH

Pushes the value of the operand onto the stack. The operand can be a register, a memory location, or an immediate value. The stack pointer (ESP or RSP) is decremented by the size of the operand before the value is stored on the stack.

POP

Pops the top value from the stack and stores it in the destination operand. The destination operand can be a register or a memory location. The stack pointer (ESP or RSP) is incremented by the size of the operand after the value is popped from the stack.

These instructions can be used to move data between registers, memory locations, or immediate values. They can also be used to load constants or perform memory address calculations.

Control flow instructions

The x86 ISA includes a variety of instructions for controlling the flow of execution in a program. The following table provides a list of some common control flow instructions and a brief description of each:

InstructionDescription

JMP

Unconditionally jumps to the specified target instruction. The target can be specified as an absolute memory address or as a relative offset from the current instruction pointer. This instruction can be used to implement loops, branches, and other control structures.

CALL

Calls a subroutine at the specified target address. The target can be specified as an absolute memory address or as a relative offset from the current instruction pointer. This instruction pushes the return address (i.e., the address of the instruction following the call) onto the stack and transfers control to the target subroutine.

RET

Returns from a subroutine. This instruction pops the return address from the stack and transfers control to that address. This instruction is typically used at the end of a subroutine to transfer control back to the calling function.

INT

Generates a software interrupt. This instruction causes the CPU to transfer control to a predefined interrupt handler routine, specified by the interrupt number. This instruction can be used to request services from the operating system or to handle other exceptions or errors.

JE/JZJumps to the target instruction if the zero flag (ZF) is set. The zero flag is set if the result of the previous operation was zero or if the operand was equal to the other operand (for comparison instructions). The target can be specified as an absolute memory address or as a relative offset from the current instruction pointer.

JNE/JNZ

Jumps to the target instruction if the zero flag (ZF) is not set. The zero flag is set if the result of the previous operation was non-zero or if the operand was not equal to the other operand (for comparison instructions). The target can be specified as an absolute memory address or as a relative offset from the current instruction pointer.

JG/JNLE

Jumps to the target instruction if the sign flag (SF) and the zero flag (ZF) are not set and the overflow flag (OF) is set. This condition indicates that the result of the previous operation was greater than zero. The target can be specified as an absolute memory address or as a relative offset from the current instruction pointer.

JGE/JNL

Jumps to the target instruction if the sign flag (SF) is not set. This condition indicates that the result of the previous operation was greater than or equal to zero. The target can be specified as an absolute memory address or as a relative offset from the current instruction pointer.

SYSCALL

Make system call in kernel, request services or access to resources.

These instructions are used to change the flow of execution in a program. They include conditional and unconditional jumps, subroutine calls and returns, and interupt.

String instructions

string instructions are a group of instructions in the x86/x64 instruction set architecture that are designed to manipulate strings of characters. These instructions can be used to perform operations such as comparing, copying, and searching for substrings within a string.

Here is a table with a list of some of the string instructions in the x86/x64 instruction set architecture, along with a brief description of each instruction:

InstructionDescription

MOVS

This instruction is used to copy a string of bytes from one memory location to another.

STOS

This instruction is used to store a string of bytes in memory.

SCAS

This instruction is used to compare a string of bytes in memory to a value specified in a register.

CMPS

This instruction is used to compare two strings of bytes in memory.

LODS

This instruction is used to load a string of bytes from memory into a register.

REPMOVS

This instruction is a variant of the MOVS instruction that can be used to repeat the string copy operation a specified number of times.

These instructions can be used in combination with other instructions and registers to perform a wide variety of operations on strings of characters. For example, the CMPS instruction can be used with the REPE or REPNE prefix to perform a repeated comparison of two strings until a specified condition is met, allowing you to search for substrings within a string.

Input/output instructions

Input/output (I/O) instructions are a group of instructions in the x86/x64 instruction set architecture that are used to interact with input and output devices such as keyboards, mice, printers, and storage devices. These instructions can be used to transfer data between the processor and I/O devices, as well as to control and configure the operation of these devices.

Here is a table with a list of some of the input/output instructions in the x86/x64 instruction set architecture, along with a brief description of each instruction:

InstructionDescription

IN

This instruction is used to read a byte or word of data from an I/O port.

OUT

This instruction is used to write a byte or word of data to an I/O port.

INS

This instruction is used to read a string of bytes or words of data from an I/O port.

OUTS

This instruction is used to write a string of bytes or words of data to an I/O port.

INT

This instruction is used to generate a software interrupt, which can be used to invoke a specific interrupt handler to process the request.

INVD

This instruction is used to invalidate the contents of the processor's internal cache. This can be useful when performing I/O operations, as it ensures that the cache is up to date with the current contents of memory.

These instructions can be used in combination with other instructions and registers to perform a wide variety of I/O operations on a computer. For example, the IN and OUT instructions can be used to read and write data to and from specific I/O ports, while the INT instruction can be used to generate an interrupt to request a specific I/O operation from an interrupt handler.

prefix instructions

In the x86/x64 instruction set architecture, a prefix is a one-byte instruction that can be used to modify the behavior of other instructions. Prefix instructions are often used to specify the size of operands or to provide additional information about the instruction that follows.

Here is a table with a list of some of the prefix instructions in the x86/x64 instruction set architecture, along with a brief description of each instruction:

InstructionDescription

REP

This prefix can be used to repeat the instruction that follows it a specified number of times.

REPE / REPZ

This prefix can be used to repeat the instruction that follows it until the zero flag is set.

REPNE / REPNZ

This prefix can be used to repeat the instruction that follows it until the zero flag is not set.

LOCK

This prefix can be used to ensure that the instruction that follows it is executed atomically, without interruption by other instructions.

CS, DS, ES, FS, GS, SS

These prefixes can be used to specify the segment register that should be used for the instruction that follows it.

OPSIZE

This prefix can be used to specify the operand size for the instruction that follows it.

ADDRSIZE

This prefix can be used to specify the address size for the instruction that follows it.

These prefix instructions can be used in combination with other instructions to modify their behavior or provide additional information. For example, the REP prefix can be used with the MOVS instruction to repeat the string copy operation a specified number of times, while the LOCK prefix can be used with the XCHG instruction to ensure that the exchange operation is atomic.

Resources

Last updated